MIT EECS | Nutanix Undergraduate Research and Innovation Scholar
Improving and Generalizing the T4 Compiler
Electrical Engineering and Computer Science
- Software Design and Programming Languages
With parallel architectures becoming more pervasive, parallelizing compilers allow programmers to write sequential code and still benefit from multicore architectures. T4, a parallelizing compiler built to leverage hardware features in the Swarm architecture, splits programs into tasks as small as tens of instructions each for speculative parallel execution. T4 defines task boundaries
using loop iterations, function calls, and loop and function call continuations. However, profiling with manually inserted task boundaries shows that tasks can be made more fine-grain in order to uncover more hidden parallelism. My project will focus on investigating new ways to define task boundaries to achieve significant parallel speedups in T4-compiled programs.
I am participating in SuperUROP in order to learn the necessary research skills for graduate school. Moreover, I am excited to learn more about ongoing research in computer architecture and compiler design while contributing to a project of interest. My goal is to have publishable results by the end of the program.