Shahir  Rahman

Shahir Rahman

Scholar Title

MIT EECS | Analog Devices Undergraduate Research and Innovation Scholar

Research Title

A Hardware Accelerator for Memory-Efficient Irregular Algorithms





Research Areas
  • Computer Systems

Daniel Sanchez


Currently, conventional processors have been designed and optimized for regular applications that work with structured data, such as dense matrices. However, many new applications such as graph analytics, linear algebra and machine learning are not efficiently executed by existing processors due to inefficient data movement. These applications work with irregular algorithms that perform operations on large, sparse data structures. The goal is to design a hardware accelerator for irregular algorithms using a CGRA based architecture. The accelerator should provide an abstract hardware/software interface for applications in various domains to efficiently run irregular algorithms and eliminate the memory-traffic bottleneck when executing these applications on conventional architectures.


I am participating in SuperUROP because I want to explore the field of computer architecture and performance more in depth. This will also tie into machine learning and analytic applications, which is a growing and interesting topic and connects to my past knowledge. I also hope to publish a paper and have meaningful results for this project.

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