Research into InGaAs transistors is motivated by the desire to scale down device dimensions below 10nm, as Si-based transistors are nearing their physical limits. In order to continue Moores Law and allow for smaller transistors, research must look to alternatives, such as III-V compound semiconductors. This project focuses on the fabrication and characterization of InGaAs trigate MOSFETs, with the hope that these devices can be scaled down to the nanometer range. Development of nanometer-scale etching, three-dimensional contacts, sidewall MOS structures and passivation, and selfaligned designs is needed to achieve this goal. In addition, this work aims to construct a model that matches simulation and experimental data, and explains the underlying mechanics of these transistors.

I worked with the del Alamo group this past summer on trigate MOSFETs, both in the measurement labs and the clean room. I have worked with the MIT Solar Electric Vehicle Team for the past two years, where I design and build parts of the electrical system. I have also interned at Solectria Renewables debugging RS-485 communication links.