Renggeng (Reng) Zheng
MIT EECS | Analog Devices Undergraduate Research and Innovation Scholar
Finding Efficient Fungible Buffer Data Placements
2024ā2025
Electrical Engineering and Computer Science
- Computer Architecture
Joel Emer
Data movement is a significant component of the energy consumption for most computer architectures. Fungible buffers, a group of multiple small buffers abstracted into a larger buffer, have been proposed to reduce the cost of data movement, as there is a positive relationship between buffer size and per-data energy access cost. A challenge of fungible buffers is that data placement within the physical buffers impacts the distance data has to move, meaning poor data placements can undermine the benefit in energy per access from smaller buffers. Our work aims to optimize data placements in fungible buffer systems, building off of a newly developed efficient fungible buffer simulator, to quantify their benefit when implemented on existing architectures.
I want to pursue computer architecture industry research, which this SuperUROP will give me experience as it involves modifying and using Nvidia Timeloop. My two years spent UROPing in the MIT EEMS group under Professors Emer and Sze gave me the knowledge needed for this project. Iām excited to do more simulation work to gain intuition on what makes a good computer architecture and to learn more about efficient research processes.