Modern processor designs have evolved significantly past the single-core designs that were prominent in the early days of computing. These modern designs, especially in desktop and server processors, usually consist of many cores with multiple levels of both shared and private caches. However, for research using these processors, it is often useful (or necessary) to investigate the topology of the processor, as well as other details that may not be freely available from the designer. For this, efficient and accurate reverse-engineering techniques are crucial. The goal of this project is to develop several reverse-engineering techniques for Intel Skylake-based architectures, allowing researchers to uncover design details necessary for their work.

I became interested in SuperUROP because it allowed me the possibility to gain valuable experience and contribute to valuable research in the field I’ m interested in, while allowing me to satisfy degree requirements at the same time.